1. Field of the Invention
This invention relates generally to cathode ray tube display systems and more particularly to apparatus that provides the bus cycle timing.
2. Description of the Prior Art
An article written by Joseph Nissam entitled "DMA Controller Capitalizes on Clock Cycles to Bypass CPU" appears on pages 117-124 of the January, 1978 issue of Computer Design. The article summarizes the prior art by describing several DMA transfer methods including the halt method, the multiplex DMA/CPU method and the "cycle steal" method. In the halt method, the CPU is shut down while the DMA transfer occurs. Its disadvantage is the relatively long time it takes to switch the CPU on and off the bus. The multiplex DMA/CPU method splits each memory cycle into two time slots, one for the CPU and the other for the DMA. This method, however, requires high speed memories for high performance. The "cycle steal" method is best for the applications considered in the above article. This has the disadvantge, however, of slowing CPU operation when DMA devices hog the memory.